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Sweet32 RISC CPU released
11-21-2014, 05:47 PM (This post was last modified: 11-21-2014 05:56 PM by Fleasystems.)
Post: #1
Sweet32 RISC CPU released
Hello again!

Just wanted to share with you all a project that I've been working on for a quite a while now - my very own RISC Microprocessor for use with FleaFPGA and even other FPGA platforms!

So.. after more than 12 months effort (part-time) I am pleased to announce the first official release of my Sweet32 MRISC Microprocessor on opencores.

Included in the attached zip file are the following Sweet32 resources:
- Sweet32 Documentation: Sweet32 CPU Overview
- Lattice Diamond project: VHDL Project sources
- Sweet32 programming tools: Sweet32 Assembler and examples

Now that the CPU arch is largely complete (along with a working assembler for it), I can now explore some high-level options for Sweet32, including c compiler support.

Feel free to download the Sweet32 bitfile into your FleaFPGA and try out the Assembler programs. You will find instructions on how to upload the program examples in the Sweet32 overview PDF.

Should you have any questions about Sweet32 please let me know. Thanks and enjoy! Smile

Regards Valentin


Attached File(s)
.7z  Sweer32_CPU_project.7z (Size: 600.93 KB / Downloads: 9)
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