PAR: Place And Route Diamond (64-bit) 3.1.0.96. Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2014 Lattice Semiconductor Corporation, All rights reserved. Mon Jun 23 19:14:10 2014 C:/lscc/diamond/3.1_x64/ispfpga\bin\nt64\par -f FleaDSO_FleaDSO.p2t FleaDSO_FleaDSO_map.ncd FleaDSO_FleaDSO.dir FleaDSO_FleaDSO.prf -gui Preference file: FleaDSO_FleaDSO.prf. Cost Table Summary Level/ Number Worst Timing Worst Timing Run NCD Cost [ncd] Unrouted Slack Score Slack(hold) Score(hold) Time Status ---------- -------- ----- ------ ----------- ----------- ----- ------ 1_1 * 0 -35.948 171113617 0.195 0 02:10 Complete * : Design saved. Total (real) run time for 1-seed: 2 mins 10 secs par done! Lattice Place and Route Report for Design "FleaDSO_FleaDSO_map.ncd" Mon Jun 23 19:14:10 2014 Best Par Run PAR: Place And Route Diamond (64-bit) 3.1.0.96. Command Line: par -w -l 1 -i 1 -t 1 -c 0 -e 0 -gui -exp parUseNBR=1:parCDP=0:parCDR=0:parPathBased=OFF FleaDSO_FleaDSO_map.ncd FleaDSO_FleaDSO.dir/1_1.ncd FleaDSO_FleaDSO.prf Preference file: FleaDSO_FleaDSO.prf. Placement level-cost: 1-1. Routing Iterations: 1 Loading design for application par from file FleaDSO_FleaDSO_map.ncd. Design name: FleaFPGA_2v5 NCD version: 3.2 Vendor: LATTICE Device: LCMXO2-7000HE Package: TQFP144 Performance: 4 Loading device for application par from file 'xo2c7000.nph' in environment: C:/lscc/diamond/3.1_x64/ispfpga. Package Status: Final Version 1.36 Performance Hardware Data Status: Final) Version 23.4 License checked out. Ignore Preference Error(s): True Device utilization summary: PIO (prelim) 77+4(JTAG)/336 24% used 77+4(JTAG)/115 70% bonded IOLOGIC 4/336 1% used SLICE 266/3432 7% used GSR 1/1 100% used EBR 1/26 3% used PLL 1/2 50% used Number of Signals: 712 Number of Connections: 1585 WARNING - par: Placement timing preferences are hard to meet. However, placement will continue. Use static timing analysis to identify errors. For more information, see online help subjects "Place & Route TRACE Report" or the "TRACE" application. Pin Constraint Summary: 72 out of 72 pins locked (100% locked). The following 3 signals are selected to use the primary clock routing resources: user_module1.ADC_clk_c (driver: user_module1/U1/PLLInst_0, clk load #: 22) user_module1.VGA_25MHz_c (driver: user_module1/U1/PLLInst_0, clk load #: 61) vga_vs_c_c (driver: user_module1/U2/SLICE_254, clk load #: 28) The following 3 signals are selected to use the secondary clock routing resources: user_module1/vga_disp_en (driver: user_module1/U2/SLICE_241, clk load #: 0, sr load #: 0, ce load #: 21) n_pb2_c (driver: n_pb2, clk load #: 0, sr load #: 0, ce load #: 14) user_module1/un7_samplerate_adj_0_a2 (driver: user_module1/SLICE_265, clk load #: 0, sr load #: 0, ce load #: 10) WARNING - par: Signal "n_pb2_c" is selected to use Secondary clock resources. However, its driver comp "n_pb2" is located at "44", which is not a dedicated pin for connecting to Secondary clock resources. General routing has to be used to route this signal, and it might suffer from excessive delay or skew. Signal sys_reset_c is selected as Global Set/Reset. . Starting Placer Phase 0. ....... Finished Placer Phase 0. REAL time: 37 secs Starting Placer Phase 1. .. Placer score = 534307. Finished Placer Phase 1. REAL time: 40 secs Starting Placer Phase 2. . Placer score = 532453 Finished Placer Phase 2. REAL time: 42 secs Clock Report Global Clock Resources: CLK_PIN : 0 out of 8 (0%) General PIO: 1 out of 336 (0%) PLL : 1 out of 2 (50%) DCM : 0 out of 2 (0%) DCC : 0 out of 8 (0%) Quadrants All (TL, TR, BL, BR) - Global Clocks: PRIMARY "user_module1.ADC_clk_c" from CLKOP on comp "user_module1/U1/PLLInst_0" on PLL site "LPLL", clk load = 22 PRIMARY "user_module1.VGA_25MHz_c" from CLKOS on comp "user_module1/U1/PLLInst_0" on PLL site "LPLL", clk load = 61 PRIMARY "vga_vs_c_c" from Q0 on comp "user_module1/U2/SLICE_254" on site "R3C19A", clk load = 28 SECONDARY "user_module1/vga_disp_en" from Q0 on comp "user_module1/U2/SLICE_241" on site "R14C18B", clk load = 0, ce load = 21, sr load = 0 SECONDARY "n_pb2_c" from comp "n_pb2" on PIO site "44 (PB12A)", clk load = 0, ce load = 14, sr load = 0 SECONDARY "user_module1/un7_samplerate_adj_0_a2" from F1 on comp "user_module1/SLICE_265" on site "R14C18A", clk load = 0, ce load = 10, sr load = 0 PRIMARY : 3 out of 8 (37%) SECONDARY: 3 out of 8 (37%) Edge Clocks: No edge clock selected. I/O Usage Summary (final): 77 + 4(JTAG) out of 336 (24.1%) PIO sites used. 77 + 4(JTAG) out of 115 (70.4%) bonded PIO sites used. Number of PIO comps: 75; differential: 2 Number of Vref pins used: 0 I/O Bank Usage Summary: +----------+----------------+------------+-----------+ | I/O Bank | Usage | Bank Vccio | Bank Vref | +----------+----------------+------------+-----------+ | 0 | 18 / 28 ( 64%) | 3.3V | - | | 1 | 10 / 29 ( 34%) | 3.3V | - | | 2 | 26 / 29 ( 89%) | 3.3V | - | | 3 | 3 / 9 ( 33%) | 3.3V | - | | 4 | 10 / 10 (100%) | 3.3V | - | | 5 | 10 / 10 (100%) | 3.3V | - | +----------+----------------+------------+-----------+ Total placer CPU time: 38 secs Dumping design to file FleaDSO_FleaDSO.dir/1_1.ncd. 0 connections routed; 1585 unrouted. Starting router resource preassignment Completed router resource preassignment. Real time: 1 mins 19 secs Start NBR router at 19:15:31 06/23/14 ***************************************************************** Info: NBR allows conflicts(one node used by more than one signal) in the earlier iterations. In each iteration, it tries to solve the conflicts while keeping the critical connections routed as short as possible. The routing process is said to be completed when no conflicts exist and all connections are routed. Note: NBR uses a different method to calculate timing slacks. The worst slack and total negative slack may not be the same as that in TRCE report. You should always run TRCE to verify your design. Thanks. ***************************************************************** Start NBR special constraint process at 19:15:31 06/23/14 Start NBR section for initial routing Level 1, iteration 1 7(0.00%) conflicts; 1064(67.13%) untouched conns; 7872084 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.862ns/-7872.084ns; real time: 1 mins 25 secs Level 2, iteration 1 41(0.01%) conflicts; 967(61.01%) untouched conns; 7852652 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.708ns/-7852.653ns; real time: 1 mins 27 secs Level 3, iteration 1 33(0.01%) conflicts; 967(61.01%) untouched conns; 7848980 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.682ns/-7848.981ns; real time: 1 mins 29 secs Level 4, iteration 1 56(0.01%) conflicts; 0(0.00%) untouched conn; 7860500 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.798ns/-7860.501ns; real time: 1 mins 31 secs Info: Initial congestion level at 75% usage is 0 Info: Initial congestion area at 75% usage is 0 (0.00%) Start NBR section for normal routing Level 4, iteration 1 45(0.01%) conflicts; 0(0.00%) untouched conn; 7856751 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.770ns/-7856.751ns; real time: 1 mins 33 secs Level 4, iteration 2 40(0.01%) conflicts; 0(0.00%) untouched conn; 7862128 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.798ns/-7862.129ns; real time: 1 mins 34 secs Level 4, iteration 3 34(0.01%) conflicts; 0(0.00%) untouched conn; 7862246 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.798ns/-7862.247ns; real time: 1 mins 36 secs Level 4, iteration 4 24(0.01%) conflicts; 0(0.00%) untouched conn; 7862246 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.798ns/-7862.247ns; real time: 1 mins 36 secs Level 4, iteration 5 23(0.01%) conflicts; 0(0.00%) untouched conn; 7896892 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.996ns/-7896.892ns; real time: 1 mins 37 secs Level 4, iteration 6 21(0.01%) conflicts; 0(0.00%) untouched conn; 7896892 (nbr) score; Estimated worst slack/total negative slack<setup>: -34.996ns/-7896.892ns; real time: 1 mins 38 secs Level 4, iteration 7 17(0.00%) conflicts; 0(0.00%) untouched conn; 7949607 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.304ns/-7949.607ns; real time: 1 mins 39 secs Level 4, iteration 8 9(0.00%) conflicts; 0(0.00%) untouched conn; 7949607 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.304ns/-7949.607ns; real time: 1 mins 39 secs Level 4, iteration 9 7(0.00%) conflicts; 0(0.00%) untouched conn; 7955399 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.320ns/-7955.400ns; real time: 1 mins 41 secs Level 4, iteration 10 9(0.00%) conflicts; 0(0.00%) untouched conn; 7955399 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.320ns/-7955.400ns; real time: 1 mins 41 secs Level 4, iteration 11 3(0.00%) conflicts; 0(0.00%) untouched conn; 8148526 (nbr) score; Estimated worst slack/total negative slack<setup>: -36.488ns/-8148.526ns; real time: 1 mins 42 secs Level 4, iteration 12 5(0.00%) conflicts; 0(0.00%) untouched conn; 8148526 (nbr) score; Estimated worst slack/total negative slack<setup>: -36.488ns/-8148.526ns; real time: 1 mins 42 secs Level 4, iteration 13 3(0.00%) conflicts; 0(0.00%) untouched conn; 8034594 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.792ns/-8034.594ns; real time: 1 mins 44 secs Level 4, iteration 14 6(0.00%) conflicts; 0(0.00%) untouched conn; 8034594 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.792ns/-8034.594ns; real time: 1 mins 44 secs Level 4, iteration 15 6(0.00%) conflicts; 0(0.00%) untouched conn; 8050611 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.906ns/-8050.611ns; real time: 1 mins 46 secs Level 4, iteration 16 1(0.00%) conflict; 0(0.00%) untouched conn; 8050611 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.906ns/-8050.611ns; real time: 1 mins 46 secs Level 4, iteration 17 1(0.00%) conflict; 0(0.00%) untouched conn; 8149049 (nbr) score; Estimated worst slack/total negative slack<setup>: -36.488ns/-8149.049ns; real time: 1 mins 47 secs Level 4, iteration 18 1(0.00%) conflict; 0(0.00%) untouched conn; 8149049 (nbr) score; Estimated worst slack/total negative slack<setup>: -36.488ns/-8149.049ns; real time: 1 mins 47 secs Level 4, iteration 19 0(0.00%) conflict; 0(0.00%) untouched conn; 8150072 (nbr) score; Estimated worst slack/total negative slack<setup>: -36.488ns/-8150.072ns; real time: 1 mins 49 secs Start NBR section for performance tunning (iteration 1) Level 4, iteration 1 10(0.00%) conflicts; 0(0.00%) untouched conn; 7919866 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.116ns/-7919.866ns; real time: 1 mins 50 secs Level 4, iteration 2 1(0.00%) conflict; 0(0.00%) untouched conn; 8060424 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.940ns/-8060.425ns; real time: 1 mins 52 secs Level 4, iteration 3 4(0.00%) conflicts; 0(0.00%) untouched conn; 7925552 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.138ns/-7925.553ns; real time: 1 mins 53 secs Level 4, iteration 4 0(0.00%) conflict; 0(0.00%) untouched conn; 7925552 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.138ns/-7925.553ns; real time: 1 mins 53 secs Start NBR section for performance tunning (iteration 2) Level 4, iteration 1 1(0.00%) conflict; 0(0.00%) untouched conn; 8061726 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.948ns/-8061.726ns; real time: 1 mins 55 secs Start NBR section for re-routing Level 4, iteration 1 0(0.00%) conflict; 0(0.00%) untouched conn; 8062160 (nbr) score; Estimated worst slack/total negative slack<setup>: -35.948ns/-8062.160ns; real time: 1 mins 58 secs Start NBR section for post-routing End NBR router with 0 unrouted connection NBR Summary ----------- Number of unrouted connections : 0 (0.00%) Number of connections with timing violations : 355 (22.40%) Estimated worst slack<setup> : -35.948ns Timing score<setup> : 171113617 ----------- Notes: The timing info is calculated for SETUP only and all PAR_ADJs are ignored. WARNING - par: Setup time error existing in the design, AHC (Auto Hold Correction) optimization is skipped. To force hold time optimization on, please read online help or run with "-exp parHold=1". Total CPU time 1 mins 57 secs Total REAL time: 2 mins 10 secs Completely routed. End of route. 1585 routed (100.00%); 0 unrouted. Checking DRC ... No errors found. Hold time timing score: 0, hold timing errors: 0 Timing score: 171113617 Dumping design to file FleaDSO_FleaDSO.dir/1_1.ncd. All signals are completely routed. PAR_SUMMARY::Run status = completed PAR_SUMMARY::Number of unrouted conns = 0 PAR_SUMMARY::Worst slack<setup/<ns>> = -35.948 PAR_SUMMARY::Timing score<setup/<ns>> = 171113.617 PAR_SUMMARY::Worst slack<hold /<ns>> = 0.195 PAR_SUMMARY::Timing score<hold /<ns>> = 0.000 PAR_SUMMARY::Number of errors = 0 Total CPU time to completion: 1 mins 57 secs Total REAL time to completion: 2 mins 10 secs par done! Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2014 Lattice Semiconductor Corporation, All rights reserved.